Re: [PATCH RFC 3/4] New 32-bit register set

Yonghong Song

Hi, Jiong,

The new patch looks good. I did some basic testing on
net-next:samples/bpf and net-next:tools/testing/selftests/bpf and it
works fine. All existing llvm unit tests are not impacted as well as

I have applied the patch to the trunk. Besides your other work to
support 32bit abi, it would be
interesting to see how new 32bit register can be used in 64bit
architecture which may help improve performance and/or reduce
instruction count.


On Tue, Sep 19, 2017 at 4:10 PM, Jiong Wang <> wrote:
On 19/09/2017 07:44, Y Song wrote:

Hi, Jiong,

Thanks for the patch! It is a great start to support 32bit register in
In the past, I have studied a little bit to see whether 32bit register
support may reduce
the number of unnecessary shifts on x86_64 and improve the
performance. Looking through
a few bpf programs and it looks like the opportunity is not great, but
still nice to have if we
have this capability. As you mentioned, this definitely helped 32bit

I am not an expert in LLVM tablegen. I briefly looked through the code
change and it looks like
correct. Hopefully some llvm-dev tablegen experts can comment on the

Below I only have a couple of minor comments.

Yong Hong,

Thanks for the review.

I have addressed your comments and attached the updated patch.

Do you want me to put this patch set on to llvm review website? I guess it
is the
formal review channel?


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